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<title>Static Call Graph - [timer\timer.axf]</title></head>
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<H1>Static Call Graph for image timer\timer.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060422: Last Updated: Tue Apr 02 10:01:51 2019
<BR><P>
<H3>Maximum Stack Usage =        480 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
StartDefaultTask &rArr; do_ping &rArr; ping_auto &rArr; ping_reply &rArr; recvfrom &rArr; wiz_recv_data &rArr; WIZCHIP_READ_BUF
<P>
<H3>
Mutually Recursive functions
</H3> <LI><a href="#[28]">ADC1_2_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[28]">ADC1_2_IRQHandler</a><BR>
 <LI><a href="#[10]">BusFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[10]">BusFault_Handler</a><BR>
 <LI><a href="#[e]">HardFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[e]">HardFault_Handler</a><BR>
 <LI><a href="#[f]">MemManage_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[f]">MemManage_Handler</a><BR>
 <LI><a href="#[78]">StartTask02</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[78]">StartTask02</a><BR>
 <LI><a href="#[11]">UsageFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[11]">UsageFault_Handler</a><BR>
</UL>
<P>
<H3>
Function Pointers
</H3><UL>
 <LI><a href="#[28]">ADC1_2_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[45]">ADC3_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[10]">BusFault_Handler</a> from stm32l4xx_it.o(i.BusFault_Handler) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[2a]">CAN1_RX0_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[2b]">CAN1_RX1_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[2c]">CAN1_SCE_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[29]">CAN1_TX_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[56]">COMP_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[53]">DFSDM1_FLT0_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[54]">DFSDM1_FLT1_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[55]">DFSDM1_FLT2_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[40]">DFSDM1_FLT3_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[70]">DHCP_time_handler</a> from dhcp.o(i.DHCP_time_handler) referenced from freertos.o(i.StartDefaultTask)
 <LI><a href="#[21]">DMA1_Channel1_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[22]">DMA1_Channel2_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[23]">DMA1_Channel3_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[24]">DMA1_Channel4_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[25]">DMA1_Channel5_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[26]">DMA1_Channel6_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[27]">DMA1_Channel7_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[4e]">DMA2_Channel1_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[4f]">DMA2_Channel2_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[50]">DMA2_Channel3_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[51]">DMA2_Channel4_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[52]">DMA2_Channel5_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[59]">DMA2_Channel6_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[5a]">DMA2_Channel7_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[71]">DNS_time_handler</a> from freertos.o(i.DNS_time_handler) referenced from freertos.o(i.StartDefaultTask)
 <LI><a href="#[13]">DebugMon_Handler</a> from stm32l4xx_it.o(i.DebugMon_Handler) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[1c]">EXTI0_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[3e]">EXTI15_10_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[1d]">EXTI1_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[1e]">EXTI2_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[1f]">EXTI3_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[20]">EXTI4_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[2d]">EXTI9_5_IRQHandler</a> from stm32l4xx_it.o(i.EXTI9_5_IRQHandler) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[1a]">FLASH_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[46]">FMC_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[64]">FPU_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[e]">HardFault_Handler</a> from stm32l4xx_it.o(i.HardFault_Handler) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[36]">I2C1_ER_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[35]">I2C1_EV_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[38]">I2C2_ER_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[37]">I2C2_EV_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[5e]">I2C3_ER_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[5d]">I2C3_EV_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[57]">LPTIM1_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[58]">LPTIM2_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[5b]">LPUART1_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[f]">MemManage_Handler</a> from stm32l4xx_it.o(i.MemManage_Handler) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[d]">NMI_Handler</a> from stm32l4xx_it.o(i.NMI_Handler) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[17]">PVD_PVM_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[14]">PendSV_Handler</a> from port.o(.emb_text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[5c]">QUADSPI_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[1b]">RCC_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[63]">RNG_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[3f]">RTC_Alarm_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[19]">RTC_WKUP_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[c]">Reset_Handler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[5f]">SAI1_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[60]">SAI2_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[47]">SDMMC1_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[39]">SPI1_IRQHandler</a> from stm32l4xx_it.o(i.SPI1_IRQHandler) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[3a]">SPI2_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[49]">SPI3_IRQHandler</a> from stm32l4xx_it.o(i.SPI3_IRQHandler) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[68]">SPI_DMAAbortOnError</a> from stm32l4xx_hal_spi.o(i.SPI_DMAAbortOnError) referenced from stm32l4xx_hal_spi.o(i.HAL_SPI_IRQHandler)
 <LI><a href="#[12]">SVC_Handler</a> from port.o(.emb_text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[61]">SWPMI1_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[77]">StartDefaultTask</a> from freertos.o(i.StartDefaultTask) referenced from freertos.o(.constdata)
 <LI><a href="#[78]">StartTask02</a> from freertos.o(i.StartTask02) referenced from freertos.o(.constdata)
 <LI><a href="#[15]">SysTick_Handler</a> from port.o(i.SysTick_Handler) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[66]">SystemInit</a> from system_stm32l4xx.o(i.SystemInit) referenced from startup_stm32l471xx.o(.text)
 <LI><a href="#[18]">TAMP_STAMP_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[2e]">TIM1_BRK_TIM15_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[31]">TIM1_CC_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[30]">TIM1_TRG_COM_TIM17_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[2f]">TIM1_UP_TIM16_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[32]">TIM2_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[33]">TIM3_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[34]">TIM4_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[48]">TIM5_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[4c]">TIM6_DAC_IRQHandler</a> from stm32l4xx_it.o(i.TIM6_DAC_IRQHandler) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[4d]">TIM7_IRQHandler</a> from stm32l4xx_it.o(i.TIM7_IRQHandler) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[41]">TIM8_BRK_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[44]">TIM8_CC_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[43]">TIM8_TRG_COM_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[42]">TIM8_UP_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[62]">TSC_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[4a]">UART4_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[4b]">UART5_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[69]">UART_DMAAbortOnError</a> from stm32l4xx_hal_uart.o(i.UART_DMAAbortOnError) referenced from stm32l4xx_hal_uart.o(i.HAL_UART_IRQHandler)
 <LI><a href="#[3b]">USART1_IRQHandler</a> from stm32l4xx_it.o(i.USART1_IRQHandler) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[3c]">USART2_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[3d]">USART3_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[11]">UsageFault_Handler</a> from stm32l4xx_it.o(i.UsageFault_Handler) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[16]">WWDG_IRQHandler</a> from startup_stm32l471xx.o(.text) referenced from startup_stm32l471xx.o(RESET)
 <LI><a href="#[67]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32l471xx.o(.text)
 <LI><a href="#[3]">default_ip_assign</a> from dhcp.o(i.default_ip_assign) referenced 2 times from dhcp.o(.data)
 <LI><a href="#[5]">default_ip_conflict</a> from dhcp.o(i.default_ip_conflict) referenced 2 times from dhcp.o(.data)
 <LI><a href="#[4]">default_ip_update</a> from dhcp.o(i.default_ip_update) referenced 2 times from dhcp.o(.data)
 <LI><a href="#[72]">fputc</a> from usart.o(i.fputc) referenced from printf8.o(i.__0printf$8)
 <LI><a href="#[65]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
 <LI><a href="#[76]">prvIdleTask</a> from tasks.o(i.prvIdleTask) referenced from tasks.o(i.vTaskStartScheduler)
 <LI><a href="#[73]">prvTaskExitError</a> from port.o(i.prvTaskExitError) referenced from port.o(i.pxPortInitialiseStack)
 <LI><a href="#[0]">timer_register_isr</a> from timer.o(i.timer_register_isr) referenced 2 times from timer.o(.data)
 <LI><a href="#[2]">timer_start_time</a> from timer.o(i.timer_start_time) referenced 2 times from timer.o(.data)
 <LI><a href="#[1]">timer_stop_time</a> from timer.o(i.timer_stop_time) referenced 2 times from timer.o(.data)
 <LI><a href="#[6c]">w5500_chip_disable</a> from w5500_drv.o(i.w5500_chip_disable) referenced from w5500interface.o(i.RegisterFunction)
 <LI><a href="#[6d]">w5500_chip_enable</a> from w5500_drv.o(i.w5500_chip_enable) referenced from w5500interface.o(i.RegisterFunction)
 <LI><a href="#[6b]">w5500_mutex_enter</a> from w5500_drv.o(i.w5500_mutex_enter) referenced from w5500interface.o(i.RegisterFunction)
 <LI><a href="#[6a]">w5500_mutex_exit</a> from w5500_drv.o(i.w5500_mutex_exit) referenced from w5500interface.o(i.RegisterFunction)
 <LI><a href="#[6f]">w5500_read_byte</a> from w5500_drv.o(i.w5500_read_byte) referenced from w5500interface.o(i.RegisterFunction)
 <LI><a href="#[6e]">w5500_write_byte</a> from w5500_drv.o(i.w5500_write_byte) referenced from w5500interface.o(i.RegisterFunction)
 <LI><a href="#[a]">wizchip_bus_readdata</a> from wizchip_conf.o(i.wizchip_bus_readdata) referenced 2 times from wizchip_conf.o(.data)
 <LI><a href="#[b]">wizchip_bus_writedata</a> from wizchip_conf.o(i.wizchip_bus_writedata) referenced 2 times from wizchip_conf.o(.data)
 <LI><a href="#[6]">wizchip_cris_enter</a> from wizchip_conf.o(i.wizchip_cris_enter) referenced 2 times from wizchip_conf.o(.data)
 <LI><a href="#[6]">wizchip_cris_enter</a> from wizchip_conf.o(i.wizchip_cris_enter) referenced from wizchip_conf.o(i.reg_wizchip_cris_cbfunc)
 <LI><a href="#[7]">wizchip_cris_exit</a> from wizchip_conf.o(i.wizchip_cris_exit) referenced 2 times from wizchip_conf.o(.data)
 <LI><a href="#[7]">wizchip_cris_exit</a> from wizchip_conf.o(i.wizchip_cris_exit) referenced from wizchip_conf.o(i.reg_wizchip_cris_cbfunc)
 <LI><a href="#[9]">wizchip_cs_deselect</a> from wizchip_conf.o(i.wizchip_cs_deselect) referenced 2 times from wizchip_conf.o(.data)
 <LI><a href="#[9]">wizchip_cs_deselect</a> from wizchip_conf.o(i.wizchip_cs_deselect) referenced from wizchip_conf.o(i.reg_wizchip_cs_cbfunc)
 <LI><a href="#[8]">wizchip_cs_select</a> from wizchip_conf.o(i.wizchip_cs_select) referenced 2 times from wizchip_conf.o(.data)
 <LI><a href="#[8]">wizchip_cs_select</a> from wizchip_conf.o(i.wizchip_cs_select) referenced from wizchip_conf.o(i.reg_wizchip_cs_cbfunc)
 <LI><a href="#[74]">wizchip_spi_readbyte</a> from wizchip_conf.o(i.wizchip_spi_readbyte) referenced from wizchip_conf.o(i.reg_wizchip_spi_cbfunc)
 <LI><a href="#[75]">wizchip_spi_writebyte</a> from wizchip_conf.o(i.wizchip_spi_writebyte) referenced from wizchip_conf.o(i.reg_wizchip_spi_cbfunc)
</UL>
<P>
<H3>
Global Symbols
</H3>
<P><STRONG><a name="[67]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(.text)
</UL>
<P><STRONG><a name="[122]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))

<P><STRONG><a name="[79]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[82]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[123]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))

<P><STRONG><a name="[124]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))

<P><STRONG><a name="[125]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))

<P><STRONG><a name="[126]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))

<P><STRONG><a name="[127]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))

<P><STRONG><a name="[12]"></a>SVC_Handler</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, port.o(.emb_text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[120]"></a>__asm___6_port_c_39a90d8d__prvStartFirstTask</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, port.o(.emb_text))
<BR><BR>[Called By]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xPortStartScheduler
</UL>

<P><STRONG><a name="[11f]"></a>__asm___6_port_c_39a90d8d__prvEnableVFP</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, port.o(.emb_text))
<BR><BR>[Called By]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xPortStartScheduler
</UL>

<P><STRONG><a name="[14]"></a>PendSV_Handler</STRONG> (Thumb, 88 bytes, Stack size 0 bytes, port.o(.emb_text))
<BR><BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskSwitchContext
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[128]"></a>vPortGetIPSR</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, port.o(.emb_text), UNUSED)

<P><STRONG><a name="[c]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[28]"></a>ADC1_2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[28]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[28]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[45]"></a>ADC3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[2a]"></a>CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[2b]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[2c]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[29]"></a>CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[56]"></a>COMP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[53]"></a>DFSDM1_FLT0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[54]"></a>DFSDM1_FLT1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[55]"></a>DFSDM1_FLT2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[40]"></a>DFSDM1_FLT3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[21]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[22]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[23]"></a>DMA1_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[24]"></a>DMA1_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[25]"></a>DMA1_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[26]"></a>DMA1_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[27]"></a>DMA1_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[4e]"></a>DMA2_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[4f]"></a>DMA2_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[50]"></a>DMA2_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[51]"></a>DMA2_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[52]"></a>DMA2_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[59]"></a>DMA2_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[5a]"></a>DMA2_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[1c]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[3e]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[1d]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[1e]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[1f]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[20]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[1a]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[46]"></a>FMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[64]"></a>FPU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[36]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[35]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[38]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[37]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[5e]"></a>I2C3_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[5d]"></a>I2C3_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[57]"></a>LPTIM1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[58]"></a>LPTIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[5b]"></a>LPUART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[17]"></a>PVD_PVM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[5c]"></a>QUADSPI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[1b]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[63]"></a>RNG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[3f]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[19]"></a>RTC_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[5f]"></a>SAI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[60]"></a>SAI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[47]"></a>SDMMC1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[3a]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[61]"></a>SWPMI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[18]"></a>TAMP_STAMP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[2e]"></a>TIM1_BRK_TIM15_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[31]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[30]"></a>TIM1_TRG_COM_TIM17_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[2f]"></a>TIM1_UP_TIM16_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[32]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[33]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[34]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[48]"></a>TIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[41]"></a>TIM8_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[44]"></a>TIM8_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[43]"></a>TIM8_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[42]"></a>TIM8_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[62]"></a>TSC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[4a]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[4b]"></a>UART5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[3c]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[3d]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[16]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32l471xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[7c]"></a>__aeabi_uldivmod</STRONG> (Thumb, 98 bytes, Stack size 40 bytes, uldiv.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __aeabi_uldivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
<LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
</UL>
<BR>[Called By]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
<LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[129]"></a>__aeabi_memcpy</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)

<P><STRONG><a name="[bf]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_FREERTOS_Init
</UL>

<P><STRONG><a name="[12a]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)

<P><STRONG><a name="[80]"></a>__aeabi_memset</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;memset
<LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
</UL>

<P><STRONG><a name="[12b]"></a>__aeabi_memset4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[12c]"></a>__aeabi_memset8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[7f]"></a>__aeabi_memclr</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
</UL>

<P><STRONG><a name="[a1]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[12d]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[81]"></a>memset</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
</UL>

<P><STRONG><a name="[7e]"></a>__aeabi_llsl</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, llshl.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
</UL>

<P><STRONG><a name="[12e]"></a>_ll_shift_l</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)

<P><STRONG><a name="[7d]"></a>__aeabi_llsr</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, llushr.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
</UL>

<P><STRONG><a name="[12f]"></a>_ll_ushift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)

<P><STRONG><a name="[7a]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
</UL>
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
</UL>

<P><STRONG><a name="[130]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)

<P><STRONG><a name="[131]"></a>__decompress</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __dczerorl2.o(.text), UNUSED)

<P><STRONG><a name="[132]"></a>__decompress1</STRONG> (Thumb, 86 bytes, Stack size unknown bytes, __dczerorl2.o(.text), UNUSED)

<P><STRONG><a name="[10]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_it.o(i.BusFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[10]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[10]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[83]"></a>ChipParametersConfiguration</STRONG> (Thumb, 66 bytes, Stack size 24 bytes, w5500interface.o(i.ChipParametersConfiguration))
<BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = ChipParametersConfiguration &rArr; ctlwizchip &rArr; wizchip_init &rArr; wizchip_sw_reset &rArr; WIZCHIP_READ_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
<LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W5500_ChipInit
</UL>

<P><STRONG><a name="[70]"></a>DHCP_time_handler</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, dhcp.o(i.DHCP_time_handler))
<BR>[Address Reference Count : 1]<UL><LI> freertos.o(i.StartDefaultTask)
</UL>
<P><STRONG><a name="[71]"></a>DNS_time_handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, freertos.o(i.DNS_time_handler))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = DNS_time_handler &rArr; __2printf
</UL>
<BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> freertos.o(i.StartDefaultTask)
</UL>
<P><STRONG><a name="[13]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_it.o(i.DebugMon_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[2d]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32l4xx_it.o(i.EXTI9_5_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = EXTI9_5_IRQHandler &rArr; HAL_GPIO_EXTI_IRQHandler
</UL>
<BR>[Calls]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_EXTI_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[c4]"></a>Error_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, main.o(i.Error_Handler))
<BR><BR>[Called By]<UL><LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM6_Init
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI3_Init
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI2_Init
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI1_Init
</UL>

<P><STRONG><a name="[9d]"></a>HAL_DMA_Abort_IT</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, stm32l4xx_hal_dma.o(i.HAL_DMA_Abort_IT))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_DMA_Abort_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_IRQHandler
</UL>

<P><STRONG><a name="[87]"></a>HAL_Delay</STRONG> (Thumb, 28 bytes, Stack size 16 bytes, stm32l4xx_hal.o(i.HAL_Delay))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_Delay
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_ping
<LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_auto
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;w5500_drv_resert
</UL>

<P><STRONG><a name="[89]"></a>HAL_GPIO_EXTI_Callback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_hal_gpio.o(i.HAL_GPIO_EXTI_Callback))
<BR><BR>[Called By]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_EXTI_IRQHandler
</UL>

<P><STRONG><a name="[86]"></a>HAL_GPIO_EXTI_IRQHandler</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, stm32l4xx_hal_gpio.o(i.HAL_GPIO_EXTI_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_GPIO_EXTI_IRQHandler
</UL>
<BR>[Calls]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_EXTI_Callback
</UL>
<BR>[Called By]<UL><LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI9_5_IRQHandler
</UL>

<P><STRONG><a name="[a2]"></a>HAL_GPIO_Init</STRONG> (Thumb, 414 bytes, Stack size 40 bytes, stm32l4xx_hal_gpio.o(i.HAL_GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
</UL>

<P><STRONG><a name="[c2]"></a>HAL_GPIO_WritePin</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32l4xx_hal_gpio.o(i.HAL_GPIO_WritePin))
<BR><BR>[Called By]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;w5500_drv_resert
<LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;w5500_chip_enable
<LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;w5500_chip_disable
</UL>

<P><STRONG><a name="[88]"></a>HAL_GetTick</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32l4xx_hal.o(i.HAL_GetTick))
<BR><BR>[Called By]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit
<LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_CheckIdleState
<LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFlagStateUntilTimeout
<LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFifoStateUntilTimeout
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
<LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLLSAI2_Config
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLLSAI1_Config
</UL>

<P><STRONG><a name="[b0]"></a>HAL_IncTick</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32l4xx_hal.o(i.HAL_IncTick))
<BR><BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PeriodElapsedCallback
</UL>

<P><STRONG><a name="[8a]"></a>HAL_Init</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, stm32l4xx_hal.o(i.HAL_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = HAL_Init &rArr; HAL_InitTick &rArr; HAL_TIM_Base_Init &rArr; TIM_Base_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_MspInit
<LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriorityGrouping
</UL>
<BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[8c]"></a>HAL_InitTick</STRONG> (Thumb, 98 bytes, Stack size 32 bytes, stm32l4xx_hal_timebase_tim.o(i.HAL_InitTick))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = HAL_InitTick &rArr; HAL_TIM_Base_Init &rArr; TIM_Base_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
<LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetClockConfig
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
<LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
<LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Start_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>

<P><STRONG><a name="[8d]"></a>HAL_MspInit</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, stm32l4xx_hal_msp.o(i.HAL_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_MspInit &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>

<P><STRONG><a name="[8f]"></a>HAL_NVIC_EnableIRQ</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32l4xx_hal_cortex.o(i.HAL_NVIC_EnableIRQ))
<BR><BR>[Called By]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_MspInit
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
</UL>

<P><STRONG><a name="[8e]"></a>HAL_NVIC_SetPriority</STRONG> (Thumb, 60 bytes, Stack size 16 bytes, stm32l4xx_hal_cortex.o(i.HAL_NVIC_SetPriority))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_MspInit
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_MspInit
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
</UL>

<P><STRONG><a name="[8b]"></a>HAL_NVIC_SetPriorityGrouping</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32l4xx_hal_cortex.o(i.HAL_NVIC_SetPriorityGrouping))
<BR><BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>

<P><STRONG><a name="[da]"></a>HAL_PWREx_ControlVoltageScaling</STRONG> (Thumb, 90 bytes, Stack size 0 bytes, stm32l4xx_hal_pwr_ex.o(i.HAL_PWREx_ControlVoltageScaling))
<BR><BR>[Called By]<UL><LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[cd]"></a>HAL_PWREx_GetVoltageRange</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32l4xx_hal_pwr_ex.o(i.HAL_PWREx_GetVoltageRange))
<BR><BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_SetFlashLatencyFromMSIRange
</UL>

<P><STRONG><a name="[95]"></a>HAL_RCCEx_PeriphCLKConfig</STRONG> (Thumb, 872 bytes, Stack size 40 bytes, stm32l4xx_hal_rcc_ex.o(i.HAL_RCCEx_PeriphCLKConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLLSAI2_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLLSAI2_Config
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLLSAI1_Config
</UL>
<BR>[Called By]<UL><LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[98]"></a>HAL_RCC_ClockConfig</STRONG> (Thumb, 264 bytes, Stack size 32 bytes, stm32l4xx_hal_rcc.o(i.HAL_RCC_ClockConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_TIM_Base_Init &rArr; TIM_Base_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[90]"></a>HAL_RCC_GetClockConfig</STRONG> (Thumb, 54 bytes, Stack size 0 bytes, stm32l4xx_hal_rcc.o(i.HAL_RCC_GetClockConfig))
<BR><BR>[Called By]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
</UL>

<P><STRONG><a name="[91]"></a>HAL_RCC_GetPCLK1Freq</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32l4xx_hal_rcc.o(i.HAL_RCC_GetPCLK1Freq))
<BR><BR>[Called By]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
</UL>

<P><STRONG><a name="[db]"></a>HAL_RCC_GetPCLK2Freq</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32l4xx_hal_rcc.o(i.HAL_RCC_GetPCLK2Freq))
<BR><BR>[Called By]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
</UL>

<P><STRONG><a name="[99]"></a>HAL_RCC_GetSysClockFreq</STRONG> (Thumb, 152 bytes, Stack size 16 bytes, stm32l4xx_hal_rcc.o(i.HAL_RCC_GetSysClockFreq))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_RCC_GetSysClockFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
</UL>

<P><STRONG><a name="[9a]"></a>HAL_RCC_OscConfig</STRONG> (Thumb, 1118 bytes, Stack size 32 bytes, stm32l4xx_hal_rcc.o(i.HAL_RCC_OscConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = HAL_RCC_OscConfig &rArr; HAL_InitTick &rArr; HAL_TIM_Base_Init &rArr; TIM_Base_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_SetFlashLatencyFromMSIRange
</UL>
<BR>[Called By]<UL><LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[9e]"></a>HAL_SPI_ErrorCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_hal_spi.o(i.HAL_SPI_ErrorCallback))
<BR><BR>[Called By]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_IRQHandler
<LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAAbortOnError
</UL>

<P><STRONG><a name="[9c]"></a>HAL_SPI_IRQHandler</STRONG> (Thumb, 246 bytes, Stack size 16 bytes, stm32l4xx_hal_spi.o(i.HAL_SPI_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_SPI_IRQHandler &rArr; HAL_DMA_Abort_IT
</UL>
<BR>[Calls]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_ErrorCallback
<LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI3_IRQHandler
<LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI1_IRQHandler
</UL>

<P><STRONG><a name="[9f]"></a>HAL_SPI_Init</STRONG> (Thumb, 172 bytes, Stack size 24 bytes, stm32l4xx_hal_spi.o(i.HAL_SPI_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = HAL_SPI_Init &rArr; HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI3_Init
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI2_Init
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI1_Init
</UL>

<P><STRONG><a name="[a0]"></a>HAL_SPI_MspInit</STRONG> (Thumb, 264 bytes, Stack size 48 bytes, spi.o(i.HAL_SPI_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
<LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Init
</UL>

<P><STRONG><a name="[a3]"></a>HAL_SPI_TransmitReceive</STRONG> (Thumb, 610 bytes, Stack size 40 bytes, stm32l4xx_hal_spi.o(i.HAL_SPI_TransmitReceive))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFifoStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
</UL>
<BR>[Called By]<UL><LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;w5500_write_byte
<LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;w5500_read_byte
</UL>

<P><STRONG><a name="[ad]"></a>HAL_TIMEx_Break2Callback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_hal_tim_ex.o(i.HAL_TIMEx_Break2Callback))
<BR><BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
</UL>

<P><STRONG><a name="[ac]"></a>HAL_TIMEx_BreakCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_hal_tim_ex.o(i.HAL_TIMEx_BreakCallback))
<BR><BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
</UL>

<P><STRONG><a name="[af]"></a>HAL_TIMEx_CommutationCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_hal_tim_ex.o(i.HAL_TIMEx_CommutationCallback))
<BR><BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
</UL>

<P><STRONG><a name="[c8]"></a>HAL_TIMEx_MasterConfigSynchronization</STRONG> (Thumb, 88 bytes, Stack size 16 bytes, stm32l4xx_hal_tim_ex.o(i.HAL_TIMEx_MasterConfigSynchronization))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_TIMEx_MasterConfigSynchronization
</UL>
<BR>[Called By]<UL><LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM6_Init
</UL>

<P><STRONG><a name="[92]"></a>HAL_TIM_Base_Init</STRONG> (Thumb, 54 bytes, Stack size 8 bytes, stm32l4xx_hal_tim.o(i.HAL_TIM_Base_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_TIM_Base_Init &rArr; TIM_Base_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_MspInit
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Base_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM6_Init
</UL>

<P><STRONG><a name="[a5]"></a>HAL_TIM_Base_MspInit</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, tim.o(i.HAL_TIM_Base_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_TIM_Base_MspInit &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
</UL>
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
</UL>

<P><STRONG><a name="[93]"></a>HAL_TIM_Base_Start_IT</STRONG> (Thumb, 44 bytes, Stack size 0 bytes, stm32l4xx_hal_tim.o(i.HAL_TIM_Base_Start_IT))
<BR><BR>[Called By]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[a8]"></a>HAL_TIM_IC_CaptureCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_hal_tim.o(i.HAL_TIM_IC_CaptureCallback))
<BR><BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
</UL>

<P><STRONG><a name="[a7]"></a>HAL_TIM_IRQHandler</STRONG> (Thumb, 388 bytes, Stack size 16 bytes, stm32l4xx_hal_tim.o(i.HAL_TIM_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_TIM_IRQHandler &rArr; HAL_TIM_PeriodElapsedCallback &rArr; timer_isr
</UL>
<BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PeriodElapsedCallback
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_TriggerCallback
<LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_PulseFinishedCallback
<LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_OC_DelayElapsedCallback
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_CaptureCallback
<LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_CommutationCallback
<LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_BreakCallback
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_Break2Callback
</UL>
<BR>[Called By]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM7_IRQHandler
<LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM6_DAC_IRQHandler
</UL>

<P><STRONG><a name="[a9]"></a>HAL_TIM_OC_DelayElapsedCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_hal_tim.o(i.HAL_TIM_OC_DelayElapsedCallback))
<BR><BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
</UL>

<P><STRONG><a name="[aa]"></a>HAL_TIM_PWM_PulseFinishedCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_hal_tim.o(i.HAL_TIM_PWM_PulseFinishedCallback))
<BR><BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
</UL>

<P><STRONG><a name="[ab]"></a>HAL_TIM_PeriodElapsedCallback</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, main.o(i.HAL_TIM_PeriodElapsedCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_TIM_PeriodElapsedCallback &rArr; timer_isr
</UL>
<BR>[Calls]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_isr
<LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_IncTick
</UL>
<BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
</UL>

<P><STRONG><a name="[ae]"></a>HAL_TIM_TriggerCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_hal_tim.o(i.HAL_TIM_TriggerCallback))
<BR><BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
</UL>

<P><STRONG><a name="[b5]"></a>HAL_UARTEx_WakeupCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_hal_uart_ex.o(i.HAL_UARTEx_WakeupCallback))
<BR><BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[b4]"></a>HAL_UART_ErrorCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_hal_uart.o(i.HAL_UART_ErrorCallback))
<BR><BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
<LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAAbortOnError
</UL>

<P><STRONG><a name="[b2]"></a>HAL_UART_IRQHandler</STRONG> (Thumb, 320 bytes, Stack size 24 bytes, stm32l4xx_hal_uart.o(i.HAL_UART_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_UART_IRQHandler &rArr; HAL_DMA_Abort_IT
</UL>
<BR>[Calls]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort_IT
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_TxCpltCallback
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_ErrorCallback
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_WakeupCallback
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
</UL>
<BR>[Called By]<UL><LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
</UL>

<P><STRONG><a name="[b7]"></a>HAL_UART_Init</STRONG> (Thumb, 106 bytes, Stack size 8 bytes, stm32l4xx_hal_uart.o(i.HAL_UART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_CheckIdleState
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_AdvFeatureConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[b8]"></a>HAL_UART_MspInit</STRONG> (Thumb, 108 bytes, Stack size 32 bytes, usart.o(i.HAL_UART_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = HAL_UART_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
<LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
</UL>

<P><STRONG><a name="[bc]"></a>HAL_UART_Transmit</STRONG> (Thumb, 176 bytes, Stack size 32 bytes, stm32l4xx_hal_uart.o(i.HAL_UART_Transmit))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = HAL_UART_Transmit &rArr; UART_WaitOnFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fputc
</UL>

<P><STRONG><a name="[b6]"></a>HAL_UART_TxCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_hal_uart.o(i.HAL_UART_TxCpltCallback))
<BR><BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[e]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_it.o(i.HardFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[be]"></a>MX_FREERTOS_Init</STRONG> (Thumb, 52 bytes, Stack size 48 bytes, freertos.o(i.MX_FREERTOS_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 208<LI>Call Chain = MX_FREERTOS_Init &rArr; osThreadCreate &rArr; xTaskCreate &rArr; pvPortMalloc &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osThreadCreate
<LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
</UL>
<BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[c1]"></a>MX_GPIO_Init</STRONG> (Thumb, 260 bytes, Stack size 56 bytes, gpio.o(i.MX_GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = MX_GPIO_Init &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
<LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
<LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[c3]"></a>MX_SPI1_Init</STRONG> (Thumb, 70 bytes, Stack size 8 bytes, spi.o(i.MX_SPI1_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = MX_SPI1_Init &rArr; HAL_SPI_Init &rArr; HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Init
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[c5]"></a>MX_SPI2_Init</STRONG> (Thumb, 68 bytes, Stack size 8 bytes, spi.o(i.MX_SPI2_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = MX_SPI2_Init &rArr; HAL_SPI_Init &rArr; HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Init
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[c6]"></a>MX_SPI3_Init</STRONG> (Thumb, 72 bytes, Stack size 8 bytes, spi.o(i.MX_SPI3_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = MX_SPI3_Init &rArr; HAL_SPI_Init &rArr; HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Init
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[c7]"></a>MX_TIM6_Init</STRONG> (Thumb, 62 bytes, Stack size 24 bytes, tim.o(i.MX_TIM6_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = MX_TIM6_Init &rArr; HAL_TIM_Base_Init &rArr; TIM_Base_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
<LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_MasterConfigSynchronization
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[c9]"></a>MX_USART1_UART_Init</STRONG> (Thumb, 52 bytes, Stack size 8 bytes, usart.o(i.MX_USART1_UART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = MX_USART1_UART_Init &rArr; HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[f]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_it.o(i.MemManage_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[d]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_it.o(i.NMI_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[ca]"></a>NetworkParameterConfiguration</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, w5500interface.o(i.NetworkParameterConfiguration))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = NetworkParameterConfiguration &rArr; ctlwizchip &rArr; wizchip_init &rArr; wizchip_sw_reset &rArr; WIZCHIP_READ_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
<LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlnetwork
<LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;w5500_print_net_info
<LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W5500_ChipInit
</UL>

<P><STRONG><a name="[ce]"></a>RegisterFunction</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, w5500interface.o(i.RegisterFunction))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = RegisterFunction &rArr; reg_wizchip_spi_cbfunc
</UL>
<BR>[Calls]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg_wizchip_spi_cbfunc
<LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg_wizchip_cs_cbfunc
<LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg_wizchip_cris_cbfunc
</UL>
<BR>[Called By]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W5500_ChipInit
</UL>

<P><STRONG><a name="[39]"></a>SPI1_IRQHandler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32l4xx_it.o(i.SPI1_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI1_IRQHandler &rArr; HAL_SPI_IRQHandler &rArr; HAL_DMA_Abort_IT
</UL>
<BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[49]"></a>SPI3_IRQHandler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32l4xx_it.o(i.SPI3_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI3_IRQHandler &rArr; HAL_SPI_IRQHandler &rArr; HAL_DMA_Abort_IT
</UL>
<BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[77]"></a>StartDefaultTask</STRONG> (Thumb, 104 bytes, Stack size 0 bytes, freertos.o(i.StartDefaultTask))
<BR><BR>[Stack]<UL><LI>Max Depth = 480<LI>Call Chain = StartDefaultTask &rArr; do_ping &rArr; ping_auto &rArr; ping_reply &rArr; recvfrom &rArr; wiz_recv_data &rArr; WIZCHIP_READ_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osDelay
<LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_ping
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W5500_ChipInit
<LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;w5500_line_connect
<LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> freertos.o(.constdata)
</UL>
<P><STRONG><a name="[78]"></a>StartTask02</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, freertos.o(i.StartTask02))
<BR><BR>[Stack]<UL><LI>Max Depth = 72 + In Cycle
<LI>Call Chain = StartTask02 &rArr;  StartTask02 (Cycle)
</UL>
<BR>[Calls]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osDelay
<LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;StartTask02
</UL>
<BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;StartTask02
</UL>
<BR>[Address Reference Count : 1]<UL><LI> freertos.o(.constdata)
</UL>
<P><STRONG><a name="[15]"></a>SysTick_Handler</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, port.o(i.SysTick_Handler))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = SysTick_Handler &rArr; xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskIncrementTick
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[d9]"></a>SystemClock_Config</STRONG> (Thumb, 106 bytes, Stack size 232 bytes, main.o(i.SystemClock_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 336<LI>Call Chain = SystemClock_Config &rArr; HAL_RCC_OscConfig &rArr; HAL_InitTick &rArr; HAL_TIM_Base_Init &rArr; TIM_Base_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
<LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_PWREx_ControlVoltageScaling
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[66]"></a>SystemInit</STRONG> (Thumb, 56 bytes, Stack size 0 bytes, system_stm32l4xx.o(i.SystemInit))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(.text)
</UL>
<P><STRONG><a name="[4c]"></a>TIM6_DAC_IRQHandler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32l4xx_it.o(i.TIM6_DAC_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = TIM6_DAC_IRQHandler &rArr; HAL_TIM_IRQHandler &rArr; HAL_TIM_PeriodElapsedCallback &rArr; timer_isr
</UL>
<BR>[Calls]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[4d]"></a>TIM7_IRQHandler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32l4xx_it.o(i.TIM7_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = TIM7_IRQHandler &rArr; HAL_TIM_IRQHandler &rArr; HAL_TIM_PeriodElapsedCallback &rArr; timer_isr
</UL>
<BR>[Calls]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[a6]"></a>TIM_Base_SetConfig</STRONG> (Thumb, 160 bytes, Stack size 32 bytes, stm32l4xx_hal_tim.o(i.TIM_Base_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = TIM_Base_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
</UL>

<P><STRONG><a name="[ba]"></a>UART_AdvFeatureConfig</STRONG> (Thumb, 200 bytes, Stack size 0 bytes, stm32l4xx_hal_uart.o(i.UART_AdvFeatureConfig))
<BR><BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
</UL>

<P><STRONG><a name="[bb]"></a>UART_CheckIdleState</STRONG> (Thumb, 92 bytes, Stack size 24 bytes, stm32l4xx_hal_uart.o(i.UART_CheckIdleState))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = UART_CheckIdleState &rArr; UART_WaitOnFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
</UL>

<P><STRONG><a name="[b9]"></a>UART_SetConfig</STRONG> (Thumb, 622 bytes, Stack size 24 bytes, stm32l4xx_hal_uart.o(i.UART_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = UART_SetConfig &rArr; __aeabi_uldivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK2Freq
<LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
</UL>

<P><STRONG><a name="[bd]"></a>UART_WaitOnFlagUntilTimeout</STRONG> (Thumb, 100 bytes, Stack size 24 bytes, stm32l4xx_hal_uart.o(i.UART_WaitOnFlagUntilTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = UART_WaitOnFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_CheckIdleState
</UL>

<P><STRONG><a name="[3b]"></a>USART1_IRQHandler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32l4xx_it.o(i.USART1_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = USART1_IRQHandler &rArr; HAL_UART_IRQHandler &rArr; HAL_DMA_Abort_IT
</UL>
<BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[11]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32l4xx_it.o(i.UsageFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[11]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[11]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32l471xx.o(RESET)
</UL>
<P><STRONG><a name="[d4]"></a>W5500_ChipInit</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, w5500interface.o(i.W5500_ChipInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 152<LI>Call Chain = W5500_ChipInit &rArr; ChipParametersConfiguration &rArr; ctlwizchip &rArr; wizchip_init &rArr; wizchip_sw_reset &rArr; WIZCHIP_READ_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RegisterFunction
<LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NetworkParameterConfiguration
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ChipParametersConfiguration
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;w5500_drv_resert
</UL>
<BR>[Called By]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;StartDefaultTask
</UL>

<P><STRONG><a name="[e3]"></a>WIZCHIP_READ</STRONG> (Thumb, 84 bytes, Stack size 24 bytes, w5500.o(i.WIZCHIP_READ))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;w5500_line_connect
<LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_auto
<LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;default_ip_update
<LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;default_ip_conflict
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
<LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sendto
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recvfrom
<LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_RX_RSR
<LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_setphypmode
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_reset
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_getphypmode
<LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_getphylink
<LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_getphyconf
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_sw_reset
<LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_setnetmode
<LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_gettimeout
<LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_getnetmode
<LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_getinterruptmask
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_getinterrupt
<LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_send_data
<LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_recv_ignore
<LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_recv_data
<LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_TX_FSR
</UL>

<P><STRONG><a name="[11c]"></a>WIZCHIP_READ_BUF</STRONG> (Thumb, 112 bytes, Stack size 32 bytes, w5500.o(i.WIZCHIP_READ_BUF))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = WIZCHIP_READ_BUF
</UL>
<BR>[Called By]<UL><LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_sw_reset
<LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_getnetinfo
<LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_recv_data
</UL>

<P><STRONG><a name="[e2]"></a>WIZCHIP_WRITE</STRONG> (Thumb, 90 bytes, Stack size 24 bytes, w5500.o(i.WIZCHIP_WRITE))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = WIZCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_auto
<LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;default_ip_update
<LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;default_ip_conflict
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
<LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sendto
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recvfrom
<LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_setphypmode
<LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_setphyconf
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_reset
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_sw_reset
<LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_settimeout
<LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_setnetmode
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_setinterruptmask
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_init
<LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_clrinterrupt
<LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_send_data
<LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_recv_ignore
<LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_recv_data
</UL>

<P><STRONG><a name="[f6]"></a>WIZCHIP_WRITE_BUF</STRONG> (Thumb, 108 bytes, Stack size 24 bytes, w5500.o(i.WIZCHIP_WRITE_BUF))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = WIZCHIP_WRITE_BUF
</UL>
<BR>[Called By]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;default_ip_update
<LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;default_ip_conflict
<LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;default_ip_assign
<LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_setnetinfo
<LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sendto
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_sw_reset
<LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_send_data
</UL>

<P><STRONG><a name="[dd]"></a>__0printf$8</STRONG> (Thumb, 22 bytes, Stack size 24 bytes, printf8.o(i.__0printf$8), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[133]"></a>__1printf$8</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printf8.o(i.__0printf$8), UNUSED)

<P><STRONG><a name="[85]"></a>__2printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printf8.o(i.__0printf$8))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = __2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_ping
<LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;StartDefaultTask
<LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DNS_time_handler
<LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_request
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_reply
<LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_auto
<LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;w5500_print_net_info
<LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NetworkParameterConfiguration
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ChipParametersConfiguration
</UL>

<P><STRONG><a name="[134]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)

<P><STRONG><a name="[135]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)

<P><STRONG><a name="[136]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)

<P><STRONG><a name="[105]"></a>checksum</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, ping.o(i.checksum))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = checksum
</UL>
<BR>[Called By]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_request
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_reply
</UL>

<P><STRONG><a name="[e1]"></a>close</STRONG> (Thumb, 108 bytes, Stack size 16 bytes, socket.o(i.close))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = close &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_auto
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recvfrom
</UL>

<P><STRONG><a name="[cb]"></a>ctlnetwork</STRONG> (Thumb, 76 bytes, Stack size 8 bytes, wizchip_conf.o(i.ctlnetwork))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = ctlnetwork &rArr; wizchip_gettimeout &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_setnetinfo
<LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_settimeout
<LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_setnetmode
<LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_gettimeout
<LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_getnetmode
<LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_getnetinfo
</UL>
<BR>[Called By]<UL><LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NetworkParameterConfiguration
</UL>

<P><STRONG><a name="[84]"></a>ctlwizchip</STRONG> (Thumb, 226 bytes, Stack size 24 bytes, wizchip_conf.o(i.ctlwizchip))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = ctlwizchip &rArr; wizchip_init &rArr; wizchip_sw_reset &rArr; WIZCHIP_READ_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_setphypmode
<LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_setphyconf
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_reset
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_getphypmode
<LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_getphylink
<LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_getphyconf
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_sw_reset
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_setinterruptmask
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_init
<LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_getinterruptmask
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_getinterrupt
<LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_clrinterrupt
</UL>
<BR>[Called By]<UL><LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NetworkParameterConfiguration
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ChipParametersConfiguration
</UL>

<P><STRONG><a name="[3]"></a>default_ip_assign</STRONG> (Thumb, 44 bytes, Stack size 8 bytes, dhcp.o(i.default_ip_assign))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = default_ip_assign &rArr; WIZCHIP_WRITE_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE_BUF
</UL>
<BR>[Called By]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;default_ip_update
</UL>
<BR>[Address Reference Count : 1]<UL><LI> dhcp.o(.data)
</UL>
<P><STRONG><a name="[5]"></a>default_ip_conflict</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, dhcp.o(i.default_ip_conflict))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = default_ip_conflict &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE_BUF
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Address Reference Count : 1]<UL><LI> dhcp.o(.data)
</UL>
<P><STRONG><a name="[4]"></a>default_ip_update</STRONG> (Thumb, 36 bytes, Stack size 8 bytes, dhcp.o(i.default_ip_update))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = default_ip_update &rArr; default_ip_assign &rArr; WIZCHIP_WRITE_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE_BUF
<LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;default_ip_assign
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Address Reference Count : 1]<UL><LI> dhcp.o(.data)
</UL>
<P><STRONG><a name="[d7]"></a>do_ping</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, ping.o(i.do_ping))
<BR><BR>[Stack]<UL><LI>Max Depth = 480<LI>Call Chain = do_ping &rArr; ping_auto &rArr; ping_reply &rArr; recvfrom &rArr; wiz_recv_data &rArr; WIZCHIP_READ_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_auto
<LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
<LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;StartDefaultTask
</UL>

<P><STRONG><a name="[72]"></a>fputc</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, usart.o(i.fputc))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = fputc &rArr; HAL_UART_Transmit &rArr; UART_WaitOnFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit
</UL>
<BR>[Address Reference Count : 1]<UL><LI> printf8.o(i.__0printf$8)
</UL>
<P><STRONG><a name="[f8]"></a>getSn_RX_RSR</STRONG> (Thumb, 76 bytes, Stack size 24 bytes, w5500.o(i.getSn_RX_RSR))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = getSn_RX_RSR &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_auto
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recvfrom
</UL>

<P><STRONG><a name="[f9]"></a>getSn_TX_FSR</STRONG> (Thumb, 76 bytes, Stack size 24 bytes, w5500.o(i.getSn_TX_FSR))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = getSn_TX_FSR &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sendto
</UL>

<P><STRONG><a name="[fa]"></a>htons</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, ping.o(i.htons))
<BR><BR>[Calls]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;swaps
</UL>
<BR>[Called By]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_request
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_reply
</UL>

<P><STRONG><a name="[65]"></a>main</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, main.o(i.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 336<LI>Call Chain = main &rArr; SystemClock_Config &rArr; HAL_RCC_OscConfig &rArr; HAL_InitTick &rArr; HAL_TIM_Base_Init &rArr; TIM_Base_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osKernelStart
<LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM6_Init
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI3_Init
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI2_Init
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI1_Init
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_FREERTOS_Init
<LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Start_IT
<LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>
<BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P><STRONG><a name="[d6]"></a>osDelay</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, cmsis_os.o(i.osDelay))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = osDelay &rArr; vTaskDelay &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskDelay
</UL>
<BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;StartTask02
<LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;StartDefaultTask
</UL>

<P><STRONG><a name="[fc]"></a>osKernelStart</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, cmsis_os.o(i.osKernelStart))
<BR><BR>[Stack]<UL><LI>Max Depth = 160<LI>Call Chain = osKernelStart &rArr; vTaskStartScheduler &rArr; xTaskCreate &rArr; pvPortMalloc &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskStartScheduler
</UL>
<BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[c0]"></a>osThreadCreate</STRONG> (Thumb, 46 bytes, Stack size 24 bytes, cmsis_os.o(i.osThreadCreate))
<BR><BR>[Stack]<UL><LI>Max Depth = 160<LI>Call Chain = osThreadCreate &rArr; xTaskCreate &rArr; pvPortMalloc &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;makeFreeRtosPriority
<LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreate
</UL>
<BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_FREERTOS_Init
</UL>

<P><STRONG><a name="[f7]"></a>ping_auto</STRONG> (Thumb, 214 bytes, Stack size 32 bytes, ping.o(i.ping_auto))
<BR><BR>[Stack]<UL><LI>Max Depth = 472<LI>Call Chain = ping_auto &rArr; ping_reply &rArr; recvfrom &rArr; wiz_recv_data &rArr; WIZCHIP_READ_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_request
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_reply
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
<LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_RX_RSR
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
<LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_ping
</UL>

<P><STRONG><a name="[103]"></a>ping_reply</STRONG> (Thumb, 370 bytes, Stack size 312 bytes, ping.o(i.ping_reply))
<BR><BR>[Stack]<UL><LI>Max Depth = 440<LI>Call Chain = ping_reply &rArr; recvfrom &rArr; wiz_recv_data &rArr; WIZCHIP_READ_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;htons
<LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;checksum
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recvfrom
<LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_auto
</UL>

<P><STRONG><a name="[102]"></a>ping_request</STRONG> (Thumb, 128 bytes, Stack size 24 bytes, ping.o(i.ping_request))
<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = ping_request &rArr; sendto &rArr; wiz_send_data &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;htons
<LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;checksum
<LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sendto
<LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_auto
</UL>

<P><STRONG><a name="[114]"></a>pvPortMalloc</STRONG> (Thumb, 210 bytes, Stack size 24 bytes, heap_4.o(i.pvPortMalloc))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = pvPortMalloc &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInsertBlockIntoFreeList
<LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvHeapInit
<LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
<LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskSuspendAll
</UL>
<BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreate
</UL>

<P><STRONG><a name="[113]"></a>pxPortInitialiseStack</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, port.o(i.pxPortInitialiseStack))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = pxPortInitialiseStack
</UL>
<BR>[Called By]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewTask
</UL>

<P><STRONG><a name="[104]"></a>recvfrom</STRONG> (Thumb, 524 bytes, Stack size 64 bytes, socket.o(i.recvfrom))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = recvfrom &rArr; wiz_recv_data &rArr; WIZCHIP_READ_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_RX_RSR
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_recv_ignore
<LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_recv_data
</UL>
<BR>[Called By]<UL><LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_reply
</UL>

<P><STRONG><a name="[cf]"></a>reg_wizchip_cris_cbfunc</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, wizchip_conf.o(i.reg_wizchip_cris_cbfunc))
<BR><BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RegisterFunction
</UL>

<P><STRONG><a name="[d0]"></a>reg_wizchip_cs_cbfunc</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, wizchip_conf.o(i.reg_wizchip_cs_cbfunc))
<BR><BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RegisterFunction
</UL>

<P><STRONG><a name="[d1]"></a>reg_wizchip_spi_cbfunc</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, wizchip_conf.o(i.reg_wizchip_spi_cbfunc))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = reg_wizchip_spi_cbfunc
</UL>
<BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RegisterFunction
</UL>

<P><STRONG><a name="[106]"></a>sendto</STRONG> (Thumb, 378 bytes, Stack size 32 bytes, socket.o(i.sendto))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = sendto &rArr; wiz_send_data &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE_BUF
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_send_data
<LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_TX_FSR
</UL>
<BR>[Called By]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_request
</UL>

<P><STRONG><a name="[101]"></a>socket</STRONG> (Thumb, 276 bytes, Stack size 32 bytes, socket.o(i.socket))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = socket &rArr; close &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ_BUF
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ping_auto
</UL>

<P><STRONG><a name="[fb]"></a>swaps</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, ping.o(i.swaps))
<BR><BR>[Called By]<UL><LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;htons
</UL>

<P><STRONG><a name="[b1]"></a>timer_isr</STRONG> (Thumb, 42 bytes, Stack size 16 bytes, timer.o(i.timer_isr))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = timer_isr
</UL>
<BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PeriodElapsedCallback
</UL>

<P><STRONG><a name="[0]"></a>timer_register_isr</STRONG> (Thumb, 46 bytes, Stack size 12 bytes, timer.o(i.timer_register_isr))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = timer_register_isr
</UL>
<BR>[Address Reference Count : 1]<UL><LI> timer.o(.data)
</UL>
<P><STRONG><a name="[2]"></a>timer_start_time</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, timer.o(i.timer_start_time))
<BR>[Address Reference Count : 1]<UL><LI> timer.o(.data)
</UL>
<P><STRONG><a name="[1]"></a>timer_stop_time</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, timer.o(i.timer_stop_time))
<BR>[Address Reference Count : 1]<UL><LI> timer.o(.data)
</UL>
<P><STRONG><a name="[108]"></a>uxListRemove</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, list.o(i.uxListRemove))
<BR><BR>[Called By]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskIncrementTick
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvIdleTask
<LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddCurrentTaskToDelayedList
<LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
</UL>

<P><STRONG><a name="[10d]"></a>vListInitialise</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, list.o(i.vListInitialise))
<BR><BR>[Called By]<UL><LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddNewTaskToReadyList
</UL>

<P><STRONG><a name="[112]"></a>vListInitialiseItem</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, list.o(i.vListInitialiseItem))
<BR><BR>[Called By]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewTask
</UL>

<P><STRONG><a name="[10a]"></a>vListInsert</STRONG> (Thumb, 48 bytes, Stack size 12 bytes, list.o(i.vListInsert))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = vListInsert
</UL>
<BR>[Called By]<UL><LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddCurrentTaskToDelayedList
</UL>

<P><STRONG><a name="[109]"></a>vListInsertEnd</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, list.o(i.vListInsertEnd))
<BR><BR>[Called By]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskIncrementTick
<LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddNewTaskToReadyList
<LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddCurrentTaskToDelayedList
<LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
</UL>

<P><STRONG><a name="[10c]"></a>vPortEnterCritical</STRONG> (Thumb, 54 bytes, Stack size 0 bytes, port.o(i.vPortEnterCritical))
<BR><BR>[Called By]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvIdleTask
<LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddNewTaskToReadyList
<LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
</UL>

<P><STRONG><a name="[10e]"></a>vPortExitCritical</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, port.o(i.vPortExitCritical))
<BR><BR>[Called By]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvIdleTask
<LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddNewTaskToReadyList
<LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
</UL>

<P><STRONG><a name="[110]"></a>vPortFree</STRONG> (Thumb, 88 bytes, Stack size 16 bytes, heap_4.o(i.vPortFree))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = vPortFree &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInsertBlockIntoFreeList
<LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
<LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskSuspendAll
</UL>
<BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreate
<LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvDeleteTCB
</UL>

<P><STRONG><a name="[11e]"></a>vPortSetupTimerInterrupt</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, port.o(i.vPortSetupTimerInterrupt))
<BR><BR>[Called By]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xPortStartScheduler
</UL>

<P><STRONG><a name="[fd]"></a>vTaskDelay</STRONG> (Thumb, 66 bytes, Stack size 8 bytes, tasks.o(i.vTaskDelay))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = vTaskDelay &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddCurrentTaskToDelayedList
<LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
<LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskSuspendAll
</UL>
<BR>[Called By]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osDelay
</UL>

<P><STRONG><a name="[fe]"></a>vTaskStartScheduler</STRONG> (Thumb, 86 bytes, Stack size 16 bytes, tasks.o(i.vTaskStartScheduler))
<BR><BR>[Stack]<UL><LI>Max Depth = 152<LI>Call Chain = vTaskStartScheduler &rArr; xTaskCreate &rArr; pvPortMalloc &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xPortStartScheduler
<LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreate
</UL>
<BR>[Called By]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osKernelStart
</UL>

<P><STRONG><a name="[115]"></a>vTaskSuspendAll</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, tasks.o(i.vTaskSuspendAll))
<BR><BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskDelay
<LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortFree
<LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvPortMalloc
</UL>

<P><STRONG><a name="[7b]"></a>vTaskSwitchContext</STRONG> (Thumb, 82 bytes, Stack size 0 bytes, tasks.o(i.vTaskSwitchContext))
<BR><BR>[Called By]<UL><LI><a href="#[14]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
</UL>

<P><STRONG><a name="[6c]"></a>w5500_chip_disable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, w5500_drv.o(i.w5500_chip_disable))
<BR><BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
</UL>
<BR>[Address Reference Count : 1]<UL><LI> w5500interface.o(i.RegisterFunction)
</UL>
<P><STRONG><a name="[6d]"></a>w5500_chip_enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, w5500_drv.o(i.w5500_chip_enable))
<BR><BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
</UL>
<BR>[Address Reference Count : 1]<UL><LI> w5500interface.o(i.RegisterFunction)
</UL>
<P><STRONG><a name="[dc]"></a>w5500_drv_resert</STRONG> (Thumb, 44 bytes, Stack size 16 bytes, w5500_drv.o(i.w5500_drv_resert))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = w5500_drv_resert &rArr; HAL_Delay
</UL>
<BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
<LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
</UL>
<BR>[Called By]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;W5500_ChipInit
</UL>

<P><STRONG><a name="[d5]"></a>w5500_line_connect</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, freertos.o(i.w5500_line_connect))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = w5500_line_connect &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;StartDefaultTask
</UL>

<P><STRONG><a name="[6b]"></a>w5500_mutex_enter</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, w5500_drv.o(i.w5500_mutex_enter))
<BR>[Address Reference Count : 1]<UL><LI> w5500interface.o(i.RegisterFunction)
</UL>
<P><STRONG><a name="[6a]"></a>w5500_mutex_exit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, w5500_drv.o(i.w5500_mutex_exit))
<BR>[Address Reference Count : 1]<UL><LI> w5500interface.o(i.RegisterFunction)
</UL>
<P><STRONG><a name="[cc]"></a>w5500_print_net_info</STRONG> (Thumb, 100 bytes, Stack size 24 bytes, w5500interface.o(i.w5500_print_net_info))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = w5500_print_net_info &rArr; __2printf
</UL>
<BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NetworkParameterConfiguration
</UL>

<P><STRONG><a name="[6f]"></a>w5500_read_byte</STRONG> (Thumb, 38 bytes, Stack size 24 bytes, w5500_drv.o(i.w5500_read_byte))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = w5500_read_byte &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFifoStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
</UL>
<BR>[Address Reference Count : 1]<UL><LI> w5500interface.o(i.RegisterFunction)
</UL>
<P><STRONG><a name="[6e]"></a>w5500_write_byte</STRONG> (Thumb, 36 bytes, Stack size 16 bytes, w5500_drv.o(i.w5500_write_byte))
<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = w5500_write_byte &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFifoStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
</UL>
<BR>[Address Reference Count : 1]<UL><LI> w5500interface.o(i.RegisterFunction)
</UL>
<P><STRONG><a name="[11a]"></a>wiz_recv_data</STRONG> (Thumb, 96 bytes, Stack size 32 bytes, w5500.o(i.wiz_recv_data))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = wiz_recv_data &rArr; WIZCHIP_READ_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ_BUF
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recvfrom
</UL>

<P><STRONG><a name="[119]"></a>wiz_recv_ignore</STRONG> (Thumb, 66 bytes, Stack size 24 bytes, w5500.o(i.wiz_recv_ignore))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = wiz_recv_ignore &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recvfrom
</UL>

<P><STRONG><a name="[11b]"></a>wiz_send_data</STRONG> (Thumb, 96 bytes, Stack size 32 bytes, w5500.o(i.wiz_send_data))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = wiz_send_data &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE_BUF
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sendto
</UL>

<P><STRONG><a name="[a]"></a>wizchip_bus_readdata</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_bus_readdata))
<BR>[Address Reference Count : 1]<UL><LI> wizchip_conf.o(.data)
</UL>
<P><STRONG><a name="[b]"></a>wizchip_bus_writedata</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_bus_writedata))
<BR>[Address Reference Count : 1]<UL><LI> wizchip_conf.o(.data)
</UL>
<P><STRONG><a name="[ec]"></a>wizchip_clrinterrupt</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, wizchip_conf.o(i.wizchip_clrinterrupt))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = wizchip_clrinterrupt &rArr; WIZCHIP_WRITE
</UL>
<BR>[Calls]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
</UL>

<P><STRONG><a name="[6]"></a>wizchip_cris_enter</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_cris_enter))
<BR>[Address Reference Count : 2]<UL><LI> wizchip_conf.o(.data)
<LI> wizchip_conf.o(i.reg_wizchip_cris_cbfunc)
</UL>
<P><STRONG><a name="[7]"></a>wizchip_cris_exit</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_cris_exit))
<BR>[Address Reference Count : 2]<UL><LI> wizchip_conf.o(.data)
<LI> wizchip_conf.o(i.reg_wizchip_cris_cbfunc)
</UL>
<P><STRONG><a name="[9]"></a>wizchip_cs_deselect</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_cs_deselect))
<BR>[Address Reference Count : 2]<UL><LI> wizchip_conf.o(.data)
<LI> wizchip_conf.o(i.reg_wizchip_cs_cbfunc)
</UL>
<P><STRONG><a name="[8]"></a>wizchip_cs_select</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_cs_select))
<BR>[Address Reference Count : 2]<UL><LI> wizchip_conf.o(.data)
<LI> wizchip_conf.o(i.reg_wizchip_cs_cbfunc)
</UL>
<P><STRONG><a name="[ed]"></a>wizchip_getinterrupt</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, wizchip_conf.o(i.wizchip_getinterrupt))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = wizchip_getinterrupt &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
</UL>

<P><STRONG><a name="[ef]"></a>wizchip_getinterruptmask</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, wizchip_conf.o(i.wizchip_getinterruptmask))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = wizchip_getinterruptmask &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
</UL>

<P><STRONG><a name="[e5]"></a>wizchip_getnetinfo</STRONG> (Thumb, 82 bytes, Stack size 8 bytes, wizchip_conf.o(i.wizchip_getnetinfo))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = wizchip_getnetinfo &rArr; WIZCHIP_READ_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ_BUF
</UL>
<BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlnetwork
</UL>

<P><STRONG><a name="[e7]"></a>wizchip_getnetmode</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_getnetmode))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = wizchip_getnetmode &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlnetwork
</UL>

<P><STRONG><a name="[e9]"></a>wizchip_gettimeout</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, wizchip_conf.o(i.wizchip_gettimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = wizchip_gettimeout &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlnetwork
</UL>

<P><STRONG><a name="[eb]"></a>wizchip_init</STRONG> (Thumb, 122 bytes, Stack size 24 bytes, wizchip_conf.o(i.wizchip_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = wizchip_init &rArr; wizchip_sw_reset &rArr; WIZCHIP_READ_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_sw_reset
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
</UL>

<P><STRONG><a name="[ee]"></a>wizchip_setinterruptmask</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, wizchip_conf.o(i.wizchip_setinterruptmask))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = wizchip_setinterruptmask &rArr; WIZCHIP_WRITE
</UL>
<BR>[Calls]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
</UL>

<P><STRONG><a name="[e4]"></a>wizchip_setnetinfo</STRONG> (Thumb, 82 bytes, Stack size 8 bytes, wizchip_conf.o(i.wizchip_setnetinfo))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = wizchip_setnetinfo &rArr; WIZCHIP_WRITE_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE_BUF
</UL>
<BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlnetwork
</UL>

<P><STRONG><a name="[e6]"></a>wizchip_setnetmode</STRONG> (Thumb, 36 bytes, Stack size 8 bytes, wizchip_conf.o(i.wizchip_setnetmode))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = wizchip_setnetmode &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlnetwork
</UL>

<P><STRONG><a name="[e8]"></a>wizchip_settimeout</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, wizchip_conf.o(i.wizchip_settimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = wizchip_settimeout &rArr; WIZCHIP_WRITE
</UL>
<BR>[Calls]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlnetwork
</UL>

<P><STRONG><a name="[74]"></a>wizchip_spi_readbyte</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_spi_readbyte))
<BR>[Address Reference Count : 1]<UL><LI> wizchip_conf.o(i.reg_wizchip_spi_cbfunc)
</UL>
<P><STRONG><a name="[75]"></a>wizchip_spi_writebyte</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_spi_writebyte))
<BR>[Address Reference Count : 1]<UL><LI> wizchip_conf.o(i.reg_wizchip_spi_cbfunc)
</UL>
<P><STRONG><a name="[ea]"></a>wizchip_sw_reset</STRONG> (Thumb, 116 bytes, Stack size 40 bytes, wizchip_conf.o(i.wizchip_sw_reset))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = wizchip_sw_reset &rArr; WIZCHIP_READ_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE_BUF
<LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ_BUF
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_init
</UL>

<P><STRONG><a name="[f2]"></a>wizphy_getphyconf</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, wizchip_conf.o(i.wizphy_getphyconf))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = wizphy_getphyconf &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
</UL>

<P><STRONG><a name="[f5]"></a>wizphy_getphylink</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, wizchip_conf.o(i.wizphy_getphylink))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = wizphy_getphylink &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
</UL>

<P><STRONG><a name="[f4]"></a>wizphy_getphypmode</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, wizchip_conf.o(i.wizphy_getphypmode))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = wizphy_getphypmode &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
</UL>

<P><STRONG><a name="[f0]"></a>wizphy_reset</STRONG> (Thumb, 42 bytes, Stack size 8 bytes, wizchip_conf.o(i.wizphy_reset))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = wizphy_reset &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_setphypmode
<LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_setphyconf
</UL>

<P><STRONG><a name="[f1]"></a>wizphy_setphyconf</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, wizchip_conf.o(i.wizphy_setphyconf))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = wizphy_setphyconf &rArr; wizphy_reset &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_reset
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
</UL>

<P><STRONG><a name="[f3]"></a>wizphy_setphypmode</STRONG> (Thumb, 80 bytes, Stack size 16 bytes, wizchip_conf.o(i.wizphy_setphypmode))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = wizphy_setphypmode &rArr; wizphy_reset &rArr; WIZCHIP_READ
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizphy_reset
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ctlwizchip
</UL>

<P><STRONG><a name="[11d]"></a>xPortStartScheduler</STRONG> (Thumb, 222 bytes, Stack size 16 bytes, port.o(i.xPortStartScheduler))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = xPortStartScheduler
</UL>
<BR>[Calls]<UL><LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortSetupTimerInterrupt
<LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__asm___6_port_c_39a90d8d__prvEnableVFP
<LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__asm___6_port_c_39a90d8d__prvStartFirstTask
</UL>
<BR>[Called By]<UL><LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskStartScheduler
</UL>

<P><STRONG><a name="[100]"></a>xTaskCreate</STRONG> (Thumb, 86 bytes, Stack size 56 bytes, tasks.o(i.xTaskCreate))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = xTaskCreate &rArr; pvPortMalloc &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewTask
<LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddNewTaskToReadyList
<LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortFree
<LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvPortMalloc
</UL>
<BR>[Called By]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osThreadCreate
<LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskStartScheduler
</UL>

<P><STRONG><a name="[d8]"></a>xTaskIncrementTick</STRONG> (Thumb, 192 bytes, Stack size 24 bytes, tasks.o(i.xTaskIncrementTick))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvResetNextTaskUnblockTime
<LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsertEnd
<LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxListRemove
</UL>
<BR>[Called By]<UL><LI><a href="#[15]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
<LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
</UL>

<P><STRONG><a name="[118]"></a>xTaskResumeAll</STRONG> (Thumb, 182 bytes, Stack size 32 bytes, tasks.o(i.xTaskResumeAll))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = xTaskResumeAll &rArr; xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskIncrementTick
<LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvResetNextTaskUnblockTime
<LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsertEnd
<LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxListRemove
<LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
<LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskDelay
<LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortFree
<LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvPortMalloc
</UL>
<P>
<H3>
Local Symbols
</H3>
<P><STRONG><a name="[68]"></a>SPI_DMAAbortOnError</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, stm32l4xx_hal_spi.o(i.SPI_DMAAbortOnError))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SPI_DMAAbortOnError
</UL>
<BR>[Calls]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_ErrorCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32l4xx_hal_spi.o(i.HAL_SPI_IRQHandler)
</UL>
<P><STRONG><a name="[a4]"></a>SPI_EndRxTxTransaction</STRONG> (Thumb, 72 bytes, Stack size 24 bytes, stm32l4xx_hal_spi.o(i.SPI_EndRxTxTransaction))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = SPI_EndRxTxTransaction &rArr; SPI_WaitFifoStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFlagStateUntilTimeout
<LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFifoStateUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
</UL>

<P><STRONG><a name="[d2]"></a>SPI_WaitFifoStateUntilTimeout</STRONG> (Thumb, 150 bytes, Stack size 32 bytes, stm32l4xx_hal_spi.o(i.SPI_WaitFifoStateUntilTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = SPI_WaitFifoStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
</UL>

<P><STRONG><a name="[d3]"></a>SPI_WaitFlagStateUntilTimeout</STRONG> (Thumb, 148 bytes, Stack size 24 bytes, stm32l4xx_hal_spi.o(i.SPI_WaitFlagStateUntilTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
</UL>

<P><STRONG><a name="[69]"></a>UART_DMAAbortOnError</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, stm32l4xx_hal_uart.o(i.UART_DMAAbortOnError))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = UART_DMAAbortOnError
</UL>
<BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_ErrorCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32l4xx_hal_uart.o(i.HAL_UART_IRQHandler)
</UL>
<P><STRONG><a name="[b3]"></a>UART_EndRxTransfer</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, stm32l4xx_hal_uart.o(i.UART_EndRxTransfer))
<BR><BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[9b]"></a>RCC_SetFlashLatencyFromMSIRange</STRONG> (Thumb, 116 bytes, Stack size 24 bytes, stm32l4xx_hal_rcc.o(i.RCC_SetFlashLatencyFromMSIRange))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = RCC_SetFlashLatencyFromMSIRange
</UL>
<BR>[Calls]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_PWREx_GetVoltageRange
</UL>
<BR>[Called By]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
</UL>

<P><STRONG><a name="[96]"></a>RCCEx_PLLSAI1_Config</STRONG> (Thumb, 278 bytes, Stack size 24 bytes, stm32l4xx_hal_rcc_ex.o(i.RCCEx_PLLSAI1_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = RCCEx_PLLSAI1_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
</UL>

<P><STRONG><a name="[97]"></a>RCCEx_PLLSAI2_Config</STRONG> (Thumb, 250 bytes, Stack size 24 bytes, stm32l4xx_hal_rcc_ex.o(i.RCCEx_PLLSAI2_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = RCCEx_PLLSAI2_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
</UL>

<P><STRONG><a name="[94]"></a>NVIC_SetPriority</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, stm32l4xx_hal_cortex.o(i.NVIC_SetPriority))
<BR><BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
</UL>

<P><STRONG><a name="[107]"></a>prvAddCurrentTaskToDelayedList</STRONG> (Thumb, 102 bytes, Stack size 24 bytes, tasks.o(i.prvAddCurrentTaskToDelayedList))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = prvAddCurrentTaskToDelayedList &rArr; vListInsert
</UL>
<BR>[Calls]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsertEnd
<LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsert
<LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxListRemove
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskDelay
</UL>

<P><STRONG><a name="[10b]"></a>prvAddNewTaskToReadyList</STRONG> (Thumb, 194 bytes, Stack size 24 bytes, tasks.o(i.prvAddNewTaskToReadyList))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = prvAddNewTaskToReadyList
</UL>
<BR>[Calls]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsertEnd
<LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
<LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
<LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInitialise
</UL>
<BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreate
</UL>

<P><STRONG><a name="[10f]"></a>prvDeleteTCB</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, tasks.o(i.prvDeleteTCB))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = prvDeleteTCB &rArr; vPortFree &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortFree
</UL>
<BR>[Called By]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvIdleTask
</UL>

<P><STRONG><a name="[76]"></a>prvIdleTask</STRONG> (Thumb, 82 bytes, Stack size 0 bytes, tasks.o(i.prvIdleTask))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = prvIdleTask &rArr; prvDeleteTCB &rArr; vPortFree &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
</UL>
<BR>[Calls]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvDeleteTCB
<LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxListRemove
<LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
<LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
</UL>
<BR>[Address Reference Count : 1]<UL><LI> tasks.o(i.vTaskStartScheduler)
</UL>
<P><STRONG><a name="[111]"></a>prvInitialiseNewTask</STRONG> (Thumb, 142 bytes, Stack size 32 bytes, tasks.o(i.prvInitialiseNewTask))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = prvInitialiseNewTask &rArr; pxPortInitialiseStack
</UL>
<BR>[Calls]<UL><LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pxPortInitialiseStack
<LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInitialiseItem
</UL>
<BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreate
</UL>

<P><STRONG><a name="[121]"></a>prvResetNextTaskUnblockTime</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, tasks.o(i.prvResetNextTaskUnblockTime))
<BR><BR>[Called By]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskIncrementTick
<LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
</UL>

<P><STRONG><a name="[ff]"></a>makeFreeRtosPriority</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, cmsis_os.o(i.makeFreeRtosPriority))
<BR><BR>[Called By]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osThreadCreate
</UL>

<P><STRONG><a name="[116]"></a>prvHeapInit</STRONG> (Thumb, 64 bytes, Stack size 0 bytes, heap_4.o(i.prvHeapInit))
<BR><BR>[Called By]<UL><LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvPortMalloc
</UL>

<P><STRONG><a name="[117]"></a>prvInsertBlockIntoFreeList</STRONG> (Thumb, 72 bytes, Stack size 12 bytes, heap_4.o(i.prvInsertBlockIntoFreeList))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = prvInsertBlockIntoFreeList
</UL>
<BR>[Called By]<UL><LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortFree
<LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvPortMalloc
</UL>

<P><STRONG><a name="[73]"></a>prvTaskExitError</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, port.o(i.prvTaskExitError))
<BR>[Address Reference Count : 1]<UL><LI> port.o(i.pxPortInitialiseStack)
</UL>
<P><STRONG><a name="[de]"></a>_printf_core</STRONG> (Thumb, 996 bytes, Stack size 104 bytes, printf8.o(i._printf_core), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_pre_padding
<LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_post_padding
</UL>
<BR>[Called By]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0printf$8
</UL>

<P><STRONG><a name="[e0]"></a>_printf_post_padding</STRONG> (Thumb, 36 bytes, Stack size 24 bytes, printf8.o(i._printf_post_padding), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[df]"></a>_printf_pre_padding</STRONG> (Thumb, 46 bytes, Stack size 24 bytes, printf8.o(i._printf_pre_padding), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>
<P>
<H3>
Undefined Global Symbols
</H3><HR></body></html>
